Field of the Invention
The invention relates in general to a serial peripheral interface and a data transmitting method thereof, and more particularly to a serial peripheral interface having a better overall behavior and a data transmitting method thereof.
Description of the Related Art
FIG. 1 (Prior Art) is a block diagram showing a conventional data transmission system. Referring to FIG. 1, the data transmission system 100 includes an integrated circuit 110 and a serial peripheral interface 120. The serial peripheral interface 120 has many pins, for example, including an input pin 122, an output pin 124, a chip select pin 126 and a clock pin 128. The input pin 122 receives a piece of serial data, including instructions and addresses, and transmits the piece of serial data to the integrated circuit 110. The output pin 124 reads a piece of serial data, including dummy cycles and multiple read out data, from the integrated circuit 110 and outputs the piece of serial data. The chip select pin 126 provides a chip select signal CS, and the clock pin 128 provides a clock signal SCLK.
FIG. 2 (Prior Art) shows timings for reading serial data in the conventional data transmission system. As shown in FIG. 2, for example, the piece of serial data includes an 8-bit instruction, a 24-bit address, n dummy cycles and multiple 8-bit read out data, wherein n is an integer greater than or equal to 0 and is not particularly limited. It can be determined according to the design of data transmission system 100. As shown in FIG. 2, when the chip select signal CS is low, the clock signal SCLK has many timing pulses. At this time, the input pin first receives the 8-bit instruction, and then receives the 24-bit address, which is the initial address of the data to be read. Then, n dummy cycles are provided for buffering. Next, the output pin reads and outputs the multiple 8-bit read out data.
The data transmission system 100 utilizes one single input pin and one single output pin of the serial peripheral interface 120 to perform the serial data transmitting operation. Consequently, only one bit of data is transmitted in one timing pulse, and the efficiency is not high. So, the overall behavior of the data transmission system 100 cannot be optimized.